1. Technical Field
This application relates to extreme ultraviolet (EUV) lithographic integrated circuit (IC) wafer fabrication and, more particularly, to a method and system for detecting and compensating for defects in EUV masks to improve IC fabrication quality.
2. Related Art
To fabricate an IC in a semiconductor substrate, a physical representation of the IC is transferred onto a pattern tool, which is then exposed to transfer this pattern onto the semiconductor substrate. A mask is a standard pattern tool used in IC processing. Typically, a mask includes patterns that can be transferred to the entire semiconductor substrate (for example, a wafer) in a single exposure. A reticle, another standard pattern tool, must be stepped and repeated to expose the entire substrate surface. For ease of reference herein, the term “mask” refers to either a reticle or a mask.
EUV lithographic IC fabrication involves patterning the mask onto an EUV mask blank to create a reticle that is used to etch the IC onto silicon wafers. A blank may consist of a low thermal expansion (LTE) substrate with a Mo/Si multilayer that reflects 13.5 nm light, which is the wavelength used for exposing the photoresist used for producing the integrated circuit patterns onto the wafers. A patterned reticle is fabricated by printing an absorber layer over the mask blank employing an electron beam writing tool that defines reflective traces corresponding to the desired pattern for IC fabrication. When the patterned reticle is exposed to EUV light, the reflective traces defined by the mask reflect the EUV light onto the silicon wafer, where the reflected light exposes a photoresist with the pattern defined by the mask. After additional develop and etch processes, this creates an integrated circuit on the wafer.
Unfortunately, the EUV mask blanks inevitably include some defects that can result in errors in the integrated circuits when etched onto the silicon wafers. These defects can occur at multiple levels within the blank. Defects within or beneath the multilayer usually are called multilayer defects. They may, for instance, comprise particles, which are disposed beneath the multilayer or which are enclosed within the multilayer, deformations of the multilayer due to bumps or pits on the substrate surface, like scratches, or local variations of the layer thickness or the roughness of single layers of the multilayer. These defects may cause a variation of the amplitude or the phase of a radiation reflected by the multilayer. The resulting phase difference in reference to the radiation reflected by portions without defects may cause variations of the intensity of the reflected radiation due to interferences.
Prior mask manufacturing technologies have not adequately addressed the challenges of defect detection, defect mitigation, and patterned mask repair for defects occurring at multiple levels within blanks in EUV lithographic fabrication of IC wafers. As such, current art approaches are inadequate for at least the reasons described above.